Chapter 30: Digital Systems

Smaller, cheaper and much of their work automated

The manual lists digital circuits as smaller and therefore cheaper, free of sensitive adjustment, robust, largely automated and updatable by software. Lower power use is not among its claims.

Better: they are more robust against it

Robustness against abuse such as impact and vibration is one of the advantages the manual gives for digital circuits. Tiny parts do not make them fragile; analogue circuits with sensitive settings are more easily upset.

Design changes can be loaded as software downloads

Design changes can be made by downloading new software rather than modifying the hardware, so the set stays current for decades. Swapping boards is the physical modification that software downloads avoid.

Their parts all vary slightly and drift as they age

Capacitors, inductors, resistors and semiconductors all vary slightly and drift with time, so analogue circuits need care and adjustment. Drifting is not wearing out, and two-valued signals are digital, not analogue.

At no stage, in manufacture or in use

Among the advantages of digital circuits the manual lists that they need no sensitive adjustment, either while being made or while in use. A one-off factory alignment is typical of analogue equipment.

A computer’s sums do the work of mixers and amplifiers

In a digital system, amplification, mixing, filtering, modulation and detection are done with numbers in a computer or DSP chip. Analogue radios use transistors and chips too, so that is no difference.

It multiplies the samples of the two signals together

Mixing is multiplication (chapter 20), and a computer multiplies numbers easily, giving the same sum and difference products. Adding samples only superimposes the two signals and makes no new frequencies.

Array processors working on thousands of numbers at once

DSP chips use tricks such as dedicated array processors, which carry out thousands of multiplications or other operations at the same time. The speed does not come from a faster clock; desktop processors often clock faster.

Based on numbers, in separate steps

‘Digital’ means based on numbers, such as integers, with nothing between neighbouring values. A quantity that can take any value, with always another in between, is analogue; the finger is only where the word comes from.

Noise and small errors no longer cause mistakes

With only two states and a wide margin either side of 2,5 V, noise and small voltage errors do not change which symbol is read. Carrying just two symbols per wire is the whole point of binary.

182

1011 0110₂ = 128 + 32 + 16 + 4 + 2 = 182, most significant bit on the left. Read from the wrong end it gives 109; 364 doubles every place value, and 198 is B6₁₆ with B taken as 12.

0010 1101₂

32 + 8 + 4 + 1 = 45, so the 32, 8, 4 and 1 places hold a 1: 0010 1101₂. Written from the wrong end it gives 1011 0100₂ (180), and 1101 0010₂ has its two groups of four swapped.

6,75

Bits after the comma are worth ½, ¼, ⅛ and so on, so 110,11₂ = 4 + 2 + 0,5 + 0,25 = 6,75. Reading the two bits after the comma as the whole number 3 gives the wrong 6,3.

233

0xE9 = 14 × 16 + 9 = 233, since the letters A to F stand for 10 to 15. Taking E as 15 gives 249, and using tens instead of sixteens gives 149.

C8₁₆

12 × 16 + 8 = 200, and 12 is written C, so 200 = C8₁₆. B stands for 11, so B8₁₆ is only 11 × 16 + 8 = 184.

D3₁₆

Split the bits into groups of four: 1101 = 13 = D and 0011 = 3, giving D3₁₆. Reading 1101 backwards gives B by mistake, and 211 is the decimal value, not hexadecimal.

1001 0011

BCD codes each decimal digit in four bits: 9 = 1001 and 3 = 0011, giving 1001 0011. 0101 1101 is 93 as a plain binary number, which is a different code.

A BCD word is not a true binary number; a hexadecimal one is

Each four-bit group in BCD holds one decimal digit, so the word is not a true binary number and needs special handling for sums; hexadecimal is simply binary, four bits to a digit. The swap is the usual slip.

0x7G4E

Hexadecimal digits run from 0 to 9 and then A to F, so G cannot appear and 0x7G4E is invalid. FACE₁₆ looks odd but is valid, since it uses only the letters A to F.

Several bytes taken together

A word is several bytes taken together; modern desktop machines mostly use 32-bit or 64-bit words, so no single size such as 16 bits fits every processor. A single binary digit is a bit.

A nibble

Four bits make a nibble and eight bits a byte; several bytes together form a word. One hexadecimal digit stands for exactly one nibble.

Its values are bits, and every result is a single bit as well

Boolean values are bits, false or true, and every answer must be a bit too: 1 OR 1 gives 1. A carry into a second bit belongs to ordinary binary arithmetic, where 1 + 1 makes 10₂.

A

In Boolean algebra + means OR, and anything OR false is itself, so A + 0 = A. Answering 0 confuses OR with AND, for which A ● 0 = 0.

1

The manual writes NOT as a minus sign: −0 = 1 and −1 = 0, so NOT always flips the bit. In ordinary arithmetic minus zero is zero, but that rule does not apply to bits.

1, as either input or both at 1 gives 1

In Boolean logic OR gives 1 when either input or both are 1, unlike the everyday ‘or’. A gate that gives 0 when both inputs are 1 is the exclusive OR (EOR).

A = 1, B = 1

EOR is true only when exactly one input is true, so with both inputs at 1 it gives 0 while OR gives 1. For the other three pairs the two gates agree.

One

AND gives 1 only when both inputs are 1, which is one pair out of 00, 01, 10 and 11. Three is the count for OR, which gives 1 when either input is 1.

An AND gate followed by a NOT gate

A NAND puts the output of an AND gate through a NOT, so its output is 0 only when all its inputs are 1. A NOT on just one input makes a different gate altogether.

A = 0, B = 0

A NOR is an OR followed by an inverter: the OR gives 0 only when both inputs are 0, so the NOR gives 1 only then. Both inputs at 1 is the one pair that makes an AND give 1.

A = 1, B = 1, C = 1

All at 1: NOT-A AND B = 0 and NOT-C = 0, so the NOR gives 1; A OR C = 1, so D = 1. With 0, 1, 1 the NOR gives 0; ignoring its circle gives a wrong D = 1.

Only what its inputs are doing right now

Combination logic simply works out its output from the inputs present now: if they stay constant, so does the output. A stored state and a clock belong to sequential logic.

Its inputs and its past state, on a clock edge

Sequential logic takes account of the past, such as earlier outputs held in latches, and works out the new output when the clock changes. Using only the present inputs is combination logic.

On the rising edge of the clock

The rising edge of Clock copies Data to Output; if Data then changes, Output holds its value until the next rising edge. The Clear input is used at switch-on to force the output to 0.

Latches

Memory is built from latches, such as the D flip-flop; plain gates only combine their present inputs. Counters and shift registers are larger blocks made by joining flip-flops together.

The output is inverted

The small circle stands for an inverter, so an OR gate with a circle on its output is a NOR. It has nothing to do with clocking or earthing.

At least twice in every cycle of its highest frequency

Nyquist requires at least two samples in each cycle, so a complex signal must be sampled at more than twice its highest frequency. One sample a cycle is too few: the samples then trace out a false, lower frequency.

8 kHz

The rate has to exceed twice the highest frequency, 2 × 3,4 = 6,8 kHz, so of these only 8 kHz will do; telephone systems use it. Sampling at 3,4 kHz gives just one sample per cycle.

20 kHz

The limit is half the sampling rate, 44,1 ÷ 2 = 22,05 kHz, nearest 20 kHz, which is why such cards cover audio to 20 kHz. The manual’s example card samples at 42 kHz.

An alias frequency

The false, lower frequency left by too few samples per cycle is an alias, and the distortion is called aliasing. An image is something else: a superhet’s unwanted response, or a copy of a signal around a clock frequency.

Lowpass or bandpass, to stop what is too high to sample

A lowpass or bandpass anti-aliasing filter removes what the sampler cannot handle; a sound card’s filter stops signals above 20 kHz. A highpass filter would pass exactly the frequencies that cause aliasing.

3 kHz

Samples taken at 10 kHz cannot tell 13 kHz from 13 − 10 = 3 kHz, so the tone appears at 3 kHz, below half the sampling rate. Taking away half the rate, to get 8 kHz, is a slip.

80 kHz

Sampling rate = 1 ÷ period, and 1 ÷ 0,000 012 = 83 333 Hz, nearest 80 kHz. Half of that, about 42 kHz, is the highest frequency such a rate can carry, not the rate itself.

1 024

An n-bit converter resolves 2ⁿ levels: 2¹⁰ = 1 024. The answer 20 confuses 2ⁿ with 2 × n, and 512 is 2⁹, one bit short.

16

Each extra bit doubles the count: 2⁴ = 16 values, 0000 to 1111. The highest of them is 15 (1111), one less than the number of values; 8 confuses 2⁴ with 2 × 4.

0,2 %

An 8-bit ADC has 2⁸ = 256 levels and is out by at most half a step: 1 ÷ 512 = 0,001 95, about 0,195 %, nearest 0,2 %. Forgetting the half gives about 0,4 %.

The ADC has only so many levels to choose from

The ADC can report only whole levels, so each sample is slightly off the true voltage; these errors come out as quantisation noise. Timing errors are aperture jitter, a separate source of noise.

6 dB

A voltage ratio in decibels is 20 log₁₀ of the ratio, and 20 log₁₀ 2 = 6,02, so about 6 dB per bit. 3 dB is the figure for halving a power, not a voltage (chapter 12).

An error of 1 or 2 steps is a big share of a small signal

The error is about ±1 or 2 steps over the whole range: a trifle beside a strong signal using most of the levels, but a large share of a weak one. The error does not grow; its share does.

A number in proportion to the input voltage

For each sample the ADC gives a number directly proportional to the input voltage, as finely as its number of bits allows. Turning numbers back into voltages is the job of the DAC.

FIR uses present and past inputs; IIR also feeds back past outputs

An FIR filter forms each output from the current input and earlier inputs only; an IIR filter also uses its own previous outputs, which is feedback. The swapped version is the usual slip.

IIR, because it feeds earlier outputs back

Feedback can make a loop oscillate (chapter 19), and only the IIR filter feeds results back; with no feedback an FIR filter is always stable. The manual names the feedback but leaves stability unsaid.

The IIR filter

IIR stands for infinite impulse response, yet the response to one pulse shrinks until it falls below the processor’s resolution, so it is not truly infinite. An FIR filter’s response is finite by design.

0,5

The outputs are 0,2, then 0,2 + 0,8 × 0,2 = 0,36, then 0,2 + 0,8 × 0,36 = 0,488, nearest 0,5: a rise towards 1 like an RC circuit charging. Adding 0,2 each time, for 0,6, ignores the 0,8 factor.

An RC lowpass filter

Its output creeps towards each new input level in ever smaller steps, the same exponential curve as a capacitor charging through a resistor. A highpass filter would pass sudden changes and block steady levels.

Coefficients, also known as tap weights

The constants that multiply the stored samples are the FIR coefficients, also called tap weights. The delay elements only hold earlier samples until they are needed.

Coefficient count, passband ripple and out-of-band rejection

More coefficients buy less passband ripple and better rejection outside the passband, at the cost of more calculation, much as extra sections do in an LC filter. Clock speed and supply voltage are hardware matters.

6

Output = 0,5 × 10 + 0,3 × 0 + 0,2 × 5 = 6, each constant paired with its own sample. Pairing them in the wrong order gives 0,5 × 5 + 0,2 × 10 = 4,5.

Any LC response, Butterworth and Chebyshev included

The FIR structure can be highly selective and can match every response of LC filters, Butterworth and Chebyshev included. It is not limited to gentle slopes or to one filter type.

Holds each sample back by one sample period

The DELAY block passes each sample on one sample period later, building the store of earlier values a filter works with. A circle marked Σ adds its inputs and a circle marked X multiplies them.

A/D converter, DSP, D/A converter

The analogue input is first turned into numbers by the A/D converter, the DSP filters those numbers by calculation, and the D/A converter turns the result back into a signal.

Sine values from a table, read out in turn by a clock

For each new phase the DDS looks up the sine value in a lookup table and passes it to a DAC at every clock pulse. Multipliers and dividers belong to other ways of making frequencies (chapter 20).

Its basic process uses no feedback loop

Direct refers to the absence of feedback: each output value is worked out outright from the phase. A PLL synthesiser, by contrast, keeps its VCO locked with a negative-feedback loop (chapter 20).

0,19 Hz

The step is the clock frequency divided by 2²⁸: 50 000 000 ÷ 268 435 456 = 0,186 Hz, nearest 0,19 Hz. Dividing by 2²⁷ instead doubles it to about 0,37 Hz.

6,25 MHz

Output = word × clock ÷ 2²⁴, and 2²⁰ ÷ 2²⁴ is 1 ÷ 16, so 100 ÷ 16 = 6,25 MHz. Taking 2⁴ as 2 × 4 = 8 gives the wrong 12,5 MHz.

The frequency setting word, a fixed phase step

Each clock pulse adds the frequency setting word to the phase register, so a bigger word steps round the cycle faster and gives a higher output frequency. Adding 360° would leave the phase unchanged.

About 90 MHz

The output is limited to about half the clock frequency, here 180 ÷ 2 = 90 MHz, and sometimes less, since each output cycle needs at least two clock samples. The clock frequency itself is out of reach.

The DAC output comes in steps, making unwanted signals

Because of quantisation the DAC output changes in steps, and the steps bring unwanted signals; a lowpass or bandpass filter removes most of them. A filter cannot raise a weak output.

It rolls over and carries on counting from 0°

Phase returns to 0 after 360°, so the register simply rolls over and keeps counting, like a car’s odometer. Stopping or reversing would break the smooth run of sine values.

A clock taken from a crystal oscillator

The DDS output is only as stable as its clock, which is usually derived from a crystal oscillator, so it is very stable and finely settable. A sharp filter cleans up the output but does not hold its frequency.

Calculating a sampled signal’s frequencies efficiently

The FFT is an efficient way of calculating which frequencies a block of samples contains, cutting the work of the direct method. It calculates rather than measures, and needs no analogue filters.

The discrete Fourier transform, or DFT

For sampled signals DSP uses the discrete Fourier transform, which takes a block of N samples and shows which sine frequencies it contains. The FFT is simply a fast way of computing it.

250 000

The direct method needs N multiplications for each of N output frequencies, so 512 × 512 = 262 144, nearest 250 000. Adding instead, 512 + 512 = 1 024, is the slip; the FFT exists to cut this work.

The sharp jumps at the two ends of each block

Cutting a signal into blocks leaves discontinuities at each end, which add unexpected spectral components; a window function tapers them away. No samples go missing between blocks; the trouble is the abrupt edges.

More output frequencies, though results are harder to allocate

Using more discrete output frequencies eases the edge effects, but it complicates deciding which output frequency a result belongs to. Windowing, which tapers the block, avoids that difficulty.

The rectangular window

A rectangular window leaves every sample of the block unchanged, so using it is the same as using none. The triangular, Blackman, Hamming and Hanning windows all shape the block.

A lowpass filter

The manual notes that window spectra resemble lowpass responses, so windows are a common starting point when lowpass filters are designed. They do not look like highpass or bandstop shapes.

Finding a filter’s output without an FFT and inverse FFT

Convolving the input with the network’s impulse response gives the output directly, which can be simpler than FFT, multiply and inverse FFT. Finding a spectrum is the FFT’s job, not convolution’s.

Multiplication

Multiplying the input spectrum by the network’s frequency response gives the output spectrum; convolving the input with the network’s impulse response does the same job in the time domain.

The network’s own impulse response

In the time domain the input is convolved with the impulse response; the frequency response is what the input spectrum is multiplied by in the frequency domain. Mixing up the two domains is the slip.

A time-reversed version

The manual describes convolution as comparing one signal with a time-inverted copy of the other. Shifting a signal in frequency is the job of a mixer.

A generic radio whose functions are all carried out in software

An SDR is a generic radio with minimal analogue parts, simple ADC and DAC circuits and a powerful DSP doing the real work in software. Working an ordinary radio from a PC does not make it an SDR.

Linrad

Linrad is free to download, runs under Linux without licence or copyright restrictions and suits experiments on old computers. Linux is the operating system it runs on, not the SDR platform itself.

Nothing elaborate: even an obsolete one will do

Linrad needs no elaborate hardware and runs on obsolete previous-generation computers, which keeps experimenting cheap. A fast modern machine is not needed.

Each set is programmed for that user’s modes and channels

The same generic radio is programmed with each user’s modulation mode, channels and tone combinations, so one stock item serves everyone. A plug-in board would be the physical change that programming avoids.